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[ImportVerilog] Convert the unpacked array to a simple bit vector #8392

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@AnnuCode AnnuCode commented Apr 4, 2025

With these changes, ImportVerilog can now convert unpacked arrays to simple bit vectors and pass this test.

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I think converting unpacked types to a packed simple bit vector might not be legal according to the SV standard 🤔. The implicit cast to a simple bit vector only exists for packed types. This touches on a similar issue as we've seen in the string type: it's an unpacked type, but we still need to be able to compare strings for equality and order. I'm wondering if we should introduce dedicated ops for comparing unpacked arrays and strings, something like moore.cmp_uarray eq %array1, %array2 and moore.cmp_string eq %array1, %array2. When we lower from Moore to the core dialects, we'll need to somehow implement these comparisons in a special way anyway, since we don't have core dialect equivalents for things like dynamic strings. So it would make sense to have a distinct op.

My suggestion would be: create a moore.cmp_uarray and moore.cmp_string operation that works like arith.cmpi and comb.icmp. It accepts two operands and a comparison predicate (eq, ne, lt, gt, etc.), and produces an i1 result. We can then start to think about how we should lower these ops, and strings/unpacked arrays in general, in MooreToCore a bit later.

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AnnuCode commented Apr 7, 2025

Thanks for the correction and the idea 💯

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